Intel GPU Power Engineer in Folsom, California

Job Description

Your responsibilities will include but not be limited to:

  • Simulation and analysis of Intel GPU/Media/Display designs' power using Power EDA tools such as Power Artist and PTPX.

  • Working with logic designers and micro-architects for design optimization for power

  • Analysis of existing RTL codes to develop power optimized codes and verify through EDA tools such as DC and Power Artist.

  • Develop power model of various design blocks to assess the power implication of proposed design features.

  • Micro-benchmark test development for power characterization.

  • Power tradeoff analysis among various design topologies/features for GPU designs to cover use-cases like Gaming, Video Playback, Compute, and Windows idle.

  • Measurement and characterization of power for various GPU workloads on platform using lab equipment such as, Logic analyzer, Oscilloscope, test boards, and thermal heads.

  • Develop Perl/Python based scripts to speed up analysis and modeling for power.

This is an entry level position and will be compensated accordingly.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

  • Candidate must have a MS or PHD degree in Electrical Engineering, Computer Engineering or any related field

  • 6+ months experience or equivalent coursework in the following areas:

  • RTL design and computer architecture fundamentals

  • Low power design fundamentals from academic background

  • Verilog RTL coding, Power aware functional verification techniques.

  • Scripting language, such as Perl, Python, Tcl, etc.

Preferred Qualifications:

  • Standard techniques such as Clock gating, Power gating, Block Activity Power, multi-VT, Dynamic Voltage-Frequency Scaling (DVFS), and Data path optimizations.

  • Exposure to industry standard Power Analysis EDA tools such as PTPX/Power Artist/Power Pro.

  • Processor architectures (GPU is a plus), and their performance/power modeling techniques.

  • Python and data analysis packages like: Pandas, NumPy, Theano.

  • Debugging capabilities at simulation, emulation, and Silicon environments, including ability to design interesting debug experiments.

  • Exposure to lab setup including power measurements equipment such as scope/DAQ is with ability to analyze board level power issues is highly desirable.

Inside this Business Group

The Core and Visual Computing Group (CVCG) is responsible for the architecture, design and development of the CPU core and visual technology IPs that are central to Intel's system-on-a-chip (SoC) products and key to our datacenter, client and Internet-of-Things (IOT) platforms. CVCG strives to lead the industry through continuous innovation and world class engineering.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance..